Verilog-AMS is a hardware description language that can model both analog and digital systems. The official description of the Verilog-AMS language is contained in the Verilog-AMS Language Reference Manual.

This site is designed to be your quick reference guide for Verilog-A and Verilog-AMS. The reference material is not complete at this point, but is still quite usable. Over time the reference material should fill out and be supplemented with useful application notes and annotated models that will help you learn to use Verilog-A/MS more effectively.

The emphasis is very much on analog and mixed-signal modeling. If you are looking for information on synthesis or the obscure corners of the Verilog language, you must look elsewhere.

We aim to make your everyday source for information on Verilog-A/MS. Please take a look around, and tell your friends and co-workers. If you have questions about Verilog-AMS, feel free to ask them on the forum at